Modern consumer electronics, such as smart phones, personal digital assistants, and location based services devices, as well as enterprise electronics, such as servers and storage arrays, are packing more integrated circuits into an ever shrinking physical space with expectations for decreasing cost. Numerous technologies have been developed to meet these requirements. Some of the research and development strategies focus on new package and integrated circuit technologies while others focus on improving the existing package and integrated circuit technologies. Research and development in the existing technologies may take a myriad of different directions. One proven way to reduce cost is to use technologies with existing manufacturing methods and equipments.
Wafer manufacturing strives to reduce transistor or capacitor feature size in order to increase circuit density and enhance functionality. Device geometries with sub-micron line widths are so common that individual chips routinely contain millions of electronic devices. Reduced feature size has been quite successful in improving electronic systems, and continuous development is expected in the future. However, significant obstacles to further reduction in feature size are being encountered. These obstacles include defect density control, optical system resolution limits, and availability of processing material and equipment. Attention has also shifted to packaging as a means to fulfill the relentless demands for enhanced system performance.
As multi-die and package stacking migrate towards system in a package (SIP) integration, integrated circuits of different technologies as well as the same technologies are packed into a single package. Modern integrated circuits and packaging solutions must operate in a single environment forcing both integrated circuit and packaging technologies to offer different functions while reducing package size.
In response to the demands for improved packaging, many innovative package designs have been conceived and brought to market. The multi-chip module has achieved a prominent role in reducing the board space. But stacking integrated devices, package-in-package, or combination thereof has system level difficulties.
Thus, a need still remains for the stacked integrated circuit package system providing multi-function, low package height, and low cost manufacturing. In view of the ever-increasing need to save costs and improve efficiencies, it is more and more critical that answers be found to these problems.
Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.